1. Field of the Invention
The present invention relates to digital communication systems in which electrical signals are varied to create discrete symbols that can be transmitted efficiently over electrical wires, fiber optic cable, or propagated over the airwaves to convey information digitally. More particularly, the present invention pertains to a very narrow bandwidth digital data communications technique in which the electromagnetic carrier signal is created from discrete cosine segments that represent the digital data to be transmitted.
2. Description of the Prior Art
Digital modulation is well known and commonly used to transmit information over a communications channel by altering certain aspects of a carrier signal. In digital modulation, the carrier signal is altered so that discrete states are created with very little chance for ambiguity between the states. Each discrete state must be different and unique from the other discrete states in order to be reliably detected at the receiving end. The discrete states correspond to one or more binary bits of data. Accordingly, the resulting modulated carrier has improved immunity to noise when compared to similar analog modulated carriers representing continuous signal transitions with no discrete states.
Carrier signals for digital modulation are typically based on sinusoidal waveforms because such waveforms require the least amount of bandwidth. There exists three classical forms of digital sinusoidal modulation: amplitude-shift keying (ASK), frequency-shift keying (FSK), and phase-shift keying (PSK). Improvements have been made in digital sinusoidal modulation, however all of the improvements been based on the three classical techniques previously mentioned. In ASK, the amplitude of the carrier signal is varied or shifted in response to changes in the digital data. In FSK, the frequency of the carrier signal is varied or shifted in response to changes in the digital data. In PSK, the phase of the carrier signal is varied or shifted in response to changes in the digital data.
There are also certain disadvantages associated with the classical modulation techniques. For example, ASK is especially susceptible to atmospheric noise and fading. FSK requires that an associated receiver detect two discrete frequencies before the frequency can be acquired and detected. This presents delays due to of the additional time required to receive the several cycles of each frequency. PSK requires complex receiver circuitry in order to detect phase changes. Furthermore, elaborate filtering is necessary to control spurious outputs resulting from the discontinuities associated with the phase changes.
One disadvantage, however, is common to all of the classical modulation techniques and their derivative improvements. This is the use of fixed time slots for varying the characteristics of the carrier signal. When fixed time slots are used, variations in the carrier signal occur at random points along the sinusoidal waveform, thus resulting in spurious frequencies and expanding the modulation bandwidth. Complex filtering becomes necessary in order to reduce the amplitude of these spurious frequencies. As the bit rate increases, the variations in the carrier signal occur more frequently, thus posing a challenging demodulation task.
It is well known that the amount of spurious output generated by the variation of a sinusoidal waveform is dependant upon the instantaneous value of the slope of the waveform when the change occurs. Thus, a change which occurs at exactly the midpoint or highest kinetic energy point of the waveform generates the greatest amount of spurious output because the slope value is at its maximum. If the change occurs at exactly the peak of the waveform however, the least amount of spurious output is generated because the slope value is at its minimum, i.e., zero kinetic energy.
Representation of discrete states of digital data is accomplished through various base band encoding techniques. FIG. 20 illustrates various base band encoding techniques. In NRZ-Level encoding 210, digital code is produced by instantaneously shifting voltage levels at fixed bit time intervals so that two unique binary symbols are represented, a one and a zero. Thus, a one is represented by one level, while a zero is represented by the other level. The NRZ-Mark digital code 212 is produced by instantaneously shifting voltage levels at fixed bit intervals only when a one is transmitted and not changing levels when a zero is transmitted. The RZ digital code 214 is produced by instantaneously shifting voltage levels at half bit-time intervals when a one is transmitted and not changing levels when a zero is transmitted. A BI-PHASE-Level digital code 216 is produced by instantaneously shifting voltage levels at half bit-time intervals so that a one is a high level during the first half of the bit time and a zero is a high level during the second half of the bit time. The NRZ-4Level digital code 218 is produced by shifting voltage levels instantaneously after two bit-time intervals. A one-one is transmitted by the top level, a one-zero is transmitted by the next lower level, a zero-one is transmitted by the next lower level, and a zero-zero is transmitted by the bottom level. By encoding two bit times into one symbol, NRZ-4Level encoding reduces the effective transitioning rate in half. Similarly, three bit times could be encoded into NRZ-8Level encoding to reduce the transitioning rate by one third. Multi-level encoding suffers from a drawback in that it necessitates a more complex receiver to detect and recover the transmitted symbol.
The prior art creates transitions at fixed bit times when encoding digital symbols. These transitions occur at the bit edges and remain steady until the next bit edge, thus requiring the transmission of a step function or rectangular pulse. The rectangular pulse or step function generates spurious energy components at frequencies from zero to infinity. Consequently, frequency multiplexing of data over a communications channel cannot be performed unless the instantaneous voltage transitions of the rectangular pulse are filtered to remove unwanted energy components throughout the frequency spectrum. The rectangular pulse and its corresponding bandwidth are shown in FIG. 21.
As an example, consider data transmitted at 1000 bits/second. The bit time T would be 1/1000 of a second, or 1 millisecond. The first frequency null would occur at 1/T or 1000 Hz and energy components would extend from zero Hz to infinity. When the rectangular pulse is used to modulate a sinusoidal carrier, the negative frequency spectrum would also be translated up in frequency and the null to null bandwidth would be 2/T or 2000 Hz. However, only the main energy lobe is absolutely necessary to recover the transmitted data. Furthermore, it is desirable to reduce the modulation bandwidth by eliminating frequency energy outside this primary lobe.
In order to transmit the maximum amount of data over a given digital communications channel, a small bandwidth and high bit rates are required. For example, more data can be transmitted over a frequency multiplexed communications channel, such as those used in satellite links, when data communication techniques are used which have narrow bandwidth requirements per carrier signal while still providing high data rates.
Much development work has gone into ways of minimizing the bandwidth of the rectangular pulse. In the prior art, the instantaneous transitions at the bit edges are smoothed by passing the rectangular pulse through filters. While the filtering process removes many of the unwanted frequencies outside of the main modulation lobe, it also removes some of the energy which helps in the symbol recovery process. Thus, a delicate balancing act must be made in choosing a filter suitable for reducing the bandwidth while not seriously degrading the modulation information contained within the symbol. It has been shown by Nyquist and others that the band limited rectangular pulse has an ideal shape after filtering which is called the sin x/x or sinc pulse.
A filtered rectangular pulse which closely approximates the ideal sinc pulse shape is commonly used to modulate a high frequency sinusoidal carrier, thus producing an upconverted frequency multiplexed communication channel which can transmit numerous messages simultaneously. Each digitally encoded base band signal is subsequently modulated with a carefully chosen local oscillator frequency in order to pack the greatest number of carrier signals within a given communications channel.
Recovery of individual carrier signals is accomplished through the use of a carefully created local oscillator capable of downconverting the carrier signal to the original digitally encoded base band signal. Due to the pulse filtering during the modulation process, the received base band signal has an "eye pattern" associated with it. This eye pattern is the result of the vertical edges of the rectangular pulse being filtered and the shape of the "eye" opening is based on the sinc pulse shape.
Conventional demodulation of the data in the two symbol case is accomplished by using a zero voltage reference. A measurement is made at the center of the bit time in order to determine whether the received symbol is above or below this zero voltage level. It is important to base the decision of which bit was received precisely at the midpoint of the bit time because the least amount of ambiguity exists between symbols at the midpoint of the bit time. Furthermore, the decision of which symbol is received is complicated by interference and noise that is present to some degree in all communications channels. The interference and noise causes the eye opening to close, thus making it critical to choose the optimum point for symbol decision making.
Further reductions in the bandwidth can be gained when more than two symbols are utilized. The number of symbols increases as a power of 2. For example, 2, 4, 8, 16, 32, 64, 128, 256, 512, and 1024 symbols are used in modern communications systems. To achieve a large number of unique and distinctive symbols, changes in carrier phase and amplitude are typically used. To go from 2 to 4 symbols gives a reduction of 2 in bandwidth. Eight symbols reduce bandwidth by one third, sixteen symbols reduces bandwidth by one fourth and so on. The penalty for increasing the number of symbols is the increased difficulty in determining which symbol was actually received.
When the binary case of two symbols is used, there is only one voltage reference needed to determine if the eye pattern is above or below the reference. However, when many symbols are used to reduce bandwidth, a corresponding increase in symbol amplitude and phase references are needed. This is further complicated by the fact that interference and noise are always present in the channel, resulting in a greater possibility of making an incorrect symbol decision when an increased number of symbols are used.
The prior art discloses various digital modulation and symbol encoding techniques. For example, U.S. Pat. No. 4,435,824 issued on Mar. 6, 1984 to Dellande et al. discloses a communication system which generates an output signal of a selected primary frequency having digital data bits serially modulated thereon. The system utilizes a hybrid differential phase-shift keyed (DPSK) modulation. The improved DPSK modulation is frequency modulation of a phase encoded signal. A controller is used to control a frequency generator means which is used to shift the frequency of the output signal between primary and secondary frequencies. The controller and frequency generator means provide a modulated output signal which is D.C. balanced bit by bit and has substantially reduced harmonic energy.
U.S. Pat. No. 4,564,823 issued on Jan. 14, 1986 to Stahler discloses a modulation system wherein a carrier signal is modulated by an input signal having a variable amplitude. The amplitude of the input signal is sampled every predetermined fractional cycle of the modulated signal. The carrier signal is modulated in response to the sampled amplitude of the input signal. This provides a modulated signal having an amplitude and duration which are inversely proportional to each other, but related to the sampled amplitude of the input signal, for each predetermined fractional cycle. The signal is subsequently demodulated by zero-crossing detection, peak-amplitude detection, or a combination of both. The system is self-clocking, does not produce discontinuous phase or amplitude changes, and does not introduce DC components.
U.S. Pat. No. 4,596,022 issued on Jun. 17, 1986 to Stoner discloses a system for communicating digital data over a limited bandwidth transmission link. The system utilizes modulator means for receiving an input digital signal and generating a corresponding frequency shift keyed signal having high-frequency and low-frequency signals with in-phase signal transitions at frequency shifts. Demodulator means are provided for receiving and demodulating the frequency shift signal in order to generate an output digital signal corresponding to the input digital signal. The demodulator means includes a zero-crossing detector in order to recover the frequency-shift keyed signal received. The system includes a transition detector for detecting transitions in the binary logic state on an input digital signal and generating a transition indicator signal in response thereto. A frequency-shift key having an oscillator capable of generating high and low frequency signals is used to provide substantially in-phase signal shifts.
U.S. Pat. No. 4,745,628 issued on May 17, 1988 to McDavid et al. discloses a symbol generator for phase modulated systems. The symbol modulator produces a filtered analog waveform for use in phase modulating a carrier. The symbol generator includes a memory for storing digital representations of analog waveform segments at predetermined addressable locations. Each segment corresponds to the cross-correlation of a predetermined filter function with a predetermined number of data bits in the data stream. The data stream is converted to an address for the memory to output a digital value to a digital to analog converter. The output of the digital to analog converter includes an in-phase and quadrature-phase components which are directed to a sample and hold circuit for generating the analog signals. The waveform segments are then sequentially assembled and directed to a vector modulator.
U.S. Pat. No. 4,871,987 issued on Oct. 3, 1989 to Kawase discloses a binary signal modulator having a circuitry for sampling a binary signal at a predetermined sampling frequency. A modulating circuit responsive to the sampled binary signal is used for generating a modulated signal whose rising and decaying timings are respectively determined by the start end times of the binary signal. The rising and decaying timings of the modulated signal are defined as predetermined functions.
U.S. Pat. No. 4,897,620 issued on Jan. 30, 1990 to Paradise discloses a continuous phase shift modulation system with improved spectrum control. The inventive method includes the step of determining, in advance, whether successive pulses are to have the same or different polarities for each of the in-phase and quadrature components. If successive components are to have the same polarity, then a continuous transition modulation signal between the successive pulses is provided in place of adjacent portions of the successive half-cosine pulses. The modulation of the other component is adjusted during the time of the continuous modulation signal so as to maintain a desirable constant amplitude characteristic.
U.S. Pat. No. 5,361,046 issued on Nov. 1, 1994 to Kaewell, Jr. et al. discloses a modulator capable of providing a fractional sample or symbol time. The modulator employs a decimation counter responsive to a clock having a frequency of M/N * symbol clock, where M is an interpolation factor and N is a decimation factor. The modulator uses this frequency to generate a data symbol clock to select frequency shift key (FSK) symbols from a sampled data array. A multiplier receives and multiplies the FSK symbols by a weighing factor which is determined by the decimation counter. The modulator allows digital modulations which consist of a non-integer number of samples per symbol time to be synthesized in an efficient manner. The modulator is also capable of producing fractional sample and symbol modulations in order to allow support of modulations with various symbol rates by hardware platforms which contain fixed digital to analog sampling clocks.
U.S. Pat. No. 5,406,584 issued on Apr. 11, 1995 to Erisman discloses a time shift keying digital communication system. The system utilizes a digital modulation technique which is unique in that fixed time slots are not used to vary the characteristics of the carrier signal. Instead, variations in the time slots are used to transfer the digital information. The modulation is created by synthesizing a carrier waveform capable of varying the time it takes for each peak to occur. The peaks of the carrier signal are tightly controlled to occur at exact discrete time slots corresponding to the base band digital signal.
U.S. Pat. No. 5,481,230 issued on Jan. 2, 1996 to Chang et al. discloses a phase modulator circuit and a method for generating an output signal having individually positionable edges. The phase modulator includes a programmable pulse generator for producing an output signal and a control value source for delivering a sequence of control values to the generator. The control values determine the time between successive output pulses. Succeeding control values are provided in response to the edges of the output signal and each next control value in the sequence is made available to the programmable pulse generator within the time between successive edges of the output.
U.S. Pat. No. 5,513,219 issued on Apr. 30, 1996 to Ham discloses a method and apparatus for transmitting information at a high rate by using an undermodulated frequency shift keyed signal. The transmission rate is independent of the data content and the system requires no zero crossing detectors. The apparatus also includes a demodulator which combines non-linear processing circuitry with a conventional demodulator.
None of the above inventions and patents, taken either singly or in combination, is seen to describe the instant invention as claimed.